NXP Semiconductors /MIMXRT1064 /SNVS /LPSMCLR

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Interpret as LPSMCLR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0MON_COUNTER

Description

SNVS_LP Secure Monotonic Counter LSB Register

Fields

MON_COUNTER

Monotonic Counter bits The MC is incremented by one when: A write transaction to the LPSMCMR or LPSMCLR Register is detected

Links

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